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    DAC
    2009
    ACM
    135views Computer Architecture» more  DAC 2009»
    Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
    14 years 9 months ago
    Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
    Download  www12.informatik.uni-erlangen.de
    In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
    Jürgen Teich, Martin Lukasiewycz, Michael Gla...
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    MEMOCODE
    2010
    IEEE
    130views Formal Methods» more  MEMOCODE 2010»
    LTSs for translation validation of (multi-clocked) SIGNAL specifications
    13 years 6 months ago
    LTSs for translation validation of (multi-clocked) SIGNAL specifications
    Download  hal.archives-ouvertes.fr
    Design of critical embedded systems demands for guarantees on the reliability of the implementation/compilation of a specification. In general, this guarantee takes either the form...
    Julio C. Peralta, Thierry Gautier, Loïc Besna...
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    EWCBR
    2008
    Springer
    194views Automated Reasoning» more  EWCBR 2008»
    Understanding Dubious Future Problems
    13 years 10 months ago
    Understanding Dubious Future Problems
    Download  www.iiia.csic.es
    Abstract. Being able to predict the performance of a Case-Based Reasoning(CBR) system against a set of future problems would provide invaluable information for design and maintenan...
    Oguz Mülâyim, Josep Lluís Arcos
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    EOR
    2007
    165views more  EOR 2007»
    Adaptive credit scoring with kernel learning methods
    13 years 8 months ago
    Adaptive credit scoring with kernel learning methods
    Download  www.crc.man.ed.ac.uk
    Credit scoring is a method of modelling potential risk of credit applications. Traditionally, logistic regression, linear regression and discriminant analysis are the most popular...
    Yingxu Yang
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    DAC
    2007
    ACM
    98views Computer Architecture» more  DAC 2007»
    Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design
    14 years 9 months ago
    Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design
    Download  www.ee.ucla.edu
    Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
    Hao Yu, Chunta Chu, Lei He
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