465 search results - page 11 / 93 » LCM: Memory System Support for Parallel Language Implementat... |
IPPS
2010
IEEE
13 years 4 months ago
2010
IEEE
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
ICPPW
2000
IEEE
13 years 11 months ago
2000
IEEE
Many pervasive computing software technologies are targeted for 32-bit desktop platforms. However, there are innumerable 8, 16, and 32-bit microcontroller and microprocessor-based...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
WOMPAT
2001
Springer
13 years 11 months ago
2001
Springer
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although cl...
ICS
2009
Tsinghua U.
14 years 1 months ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...