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122
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ICS
2009
Tsinghua U.
15 years 9 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
130
Voted
ICS
2007
Tsinghua U.
15 years 8 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow
138
Voted
PPDP
2004
Springer
15 years 7 months ago
JIAD: a tool to infer design patterns in refactoring
Refactoring in object-orientation has gained increased attention due to its ability to improve design quality. Refactoring using design patterns (DPs) leads to production of high ...
J. Rajesh, D. Janakiram
CODES
2007
IEEE
15 years 6 months ago
Influence of procedure cloning on WCET prediction
For the worst-case execution time (WCET) analysis, especially loops are an inherent source of unpredictability and loss of precision. This is caused by the difficulty to obtain sa...
Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, ...
CASES
2010
ACM
15 years 15 days ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra