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INFOCOM
2008
IEEE
14 years 3 months ago
Minerva: Learning to Infer Network Path Properties
—Knowledge of the network path properties such as latency, hop count, loss and bandwidth is key to the performance of overlay networks, grids and p2p applications. Network operat...
Rita H. Wouhaybi, Puneet Sharma, Sujata Banerjee, ...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 3 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
AAAIDEA
2005
IEEE
14 years 2 months ago
Design and Evaluation of Diffserv Functionalities in the MPLS Edge Router Architecture
—Differentiated Service (DiffServ) in combination with Multi-Protocol Label Switching (MPLS) is a promising technology in converting the best-effort Internet into a QoS-capable n...
Wei-Chu Lai, Kuo-Ching Wu, Ting-Chao Hou
PVM
2005
Springer
14 years 2 months ago
Scalable Fault Tolerant MPI: Extending the Recovery Algorithm
ct Fault Tolerant MPI (FT-MPI)[6] was designed as a solution to allow applications different methods to handle process failures beyond simple check-point restart schemes. The init...
Graham E. Fagg, Thara Angskun, George Bosilca, Jel...
EUROPAR
2000
Springer
14 years 18 days ago
On the Performance of Fetch Engines Running DSS Workloads
Abstract This paper examines the behavior of current and next generation microprocessors' fetch engines while running Decision Support Systems (DSS) workloads. We analyze the ...
Carlos Navarro, Alex Ramírez, Josep-Lluis L...