251 search results - page 36 / 51 » Lattice-Valued Binary Decision Diagrams |
ICCAD
2002
IEEE
14 years 6 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
CGO
2010
IEEE
14 years 4 months ago
2010
IEEE
Prior work has shown that reduced, ordered, binary decision diagrams (BDDs) can be a powerful tool for program trace analysis and visualization. Unfortunately, it can take hours o...
SEFM
2008
IEEE
14 years 4 months ago
2008
IEEE
Attempts to dereference null result in an exception or a segmentation fault. Hence it is important to know those program points where this might occur and prove the others (or the...
ATVA
2007
Springer
14 years 3 months ago
2007
Springer
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...
COCOA
2007
Springer
14 years 3 months ago
2007
Springer
Abstract. Many combinatorial optimization problems can be formulated as 0/1 integer programs (0/1 IPs). The investigation of the structure of these problems raises the following ta...