A novel object-oriented processor is proposed in this paper, which provides support for object addressing, message passing and dynamic memory management. Object running on this pr...
Weixing Ji, Feng Shi, Baojun Qiao, Muhammad Kamran
Non-uniform memory architectures with cache coherence (ccNUMA) are becoming increasingly common, not just for large-scale high performance platforms but also in the context of mul...
Heap size has a huge impact on the performance of garbage collected applications. A heap that barely meets the application’s needs causes excessive GC overhead, while a heap tha...
Ting Yang, Matthew Hertz, Emery D. Berger, Scott F...
Abstract. The Real-time Specification for Java (RTSJ) introduced a range of language features for explicit memory management. While the RTSJ gives programmers fine control over mem...
Tian Zhao, Jason Baker, James Hunt, James Noble, J...
In this work we modify the conventional row buffer allocation mechanism used in DDR2 SDRAM banks to improve average memory latency and overall processor performance. Our method as...