601 search results - page 97 / 121 » Lattice-based memory allocation |
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
PPOPP
2006
ACM
14 years 1 months ago
2006
ACM
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further ex...
ISQED
2005
IEEE
14 years 1 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
ESTIMEDIA
2005
Springer
14 years 1 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...