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DATE
2004
IEEE
105views Hardware» more  DATE 2004»
13 years 11 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....
INFOCOM
2007
IEEE
14 years 1 months ago
Millimeter Wave WPAN: Cross-Layer Modeling and Multi-Hop Architecture
— The 7 GHz of unlicensed spectrum in the 60 GHz band offers the potential for multiGigabit indoor wireless personal area networking (WPAN). With recent advances in the speed of ...
Sumit Singh, Federico Ziliotto, Upamanyu Madhow, E...
WOSP
2010
ACM
14 years 2 months ago
Performance aware open-world software in a 3-layer architecture
Diego Perez-Palacin, José Merseguer, Simona...