— In this paper, we present the first work on the Steiner routing for 3D stacked ICs. In the 3D Steiner routing problem, the pins are located in multiple device layers, which ma...
Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
—We present a middleware platform for assembling pervasive applications that demand fault-tolerance and adaptivity in distributed, dynamic environments. Unlike typical adaptive m...
Hubert Pham, Justin Mazzola Paluska, Umar Saif, Ch...
The Web 2.0 fosters the creation of communities by offering users a wide array of social software tools. While the success of these tools is based on their ability to support diff...
Angelo Di Iorio, Davide Rossi, Fabio Vitali, Stefa...
—We consider a new generation of COTS Software Routers (SRs), able to effectively exploit multi-Core/CPU HW platforms. Our main objective is to evaluate and to model the impact o...