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TCAD
2010
107views more  TCAD 2010»
13 years 2 months ago
Evaluating Statistical Power Optimization
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this ...
Jason Cong, Puneet Gupta, John Lee
JCSC
2002
129views more  JCSC 2002»
13 years 7 months ago
Leakage Current Reduction in VLSI Systems
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...
CHES
2003
Springer
100views Cryptology» more  CHES 2003»
14 years 1 months ago
Multi-channel Attacks
We introduce multi-channel attacks, i.e., side-channel attacks which utilize multiple side-channels such as power and EM simultaneously. We propose an adversarial model which combi...
Dakshi Agrawal, Josyula R. Rao, Pankaj Rohatgi
ICCAD
2007
IEEE
124views Hardware» more  ICCAD 2007»
14 years 4 months ago
3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits
Abstract— Thermal issues are a primary concern in the threedimensional (3D) integrated circuit (IC) design. Temperature, area, and wire length must be simultaneously optimized du...
Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. ...
IEEEPACT
2002
IEEE
14 years 27 days ago
Efficient Interconnects for Clustered Microarchitectures
Clustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we inv...
Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio G...