491 search results - page 4 / 99 » Leakage power modeling and optimization in interconnection n... |
CHES
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. A classical model is used for the power consumption of cryptographic devices. It is based on the Hamming distance of the data handled with regard to an unknown but consta...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
In many Systems on Chips (SoCs), the cores are clustered in to voltage islands. When cores in an island are unused, the entire island can be shutdown to reduce the leakage power c...