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» Learning Logic Programs for Layout Analysis Correction
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DATE
2010
IEEE
168views Hardware» more  DATE 2010»
14 years 26 days ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
POPL
2011
ACM
12 years 10 months ago
Dynamic inference of static types for ruby
There have been several efforts to bring static type inference to object-oriented dynamic languages such as Ruby, Python, and Perl. In our experience, however, such type inference...
Jong-hoon (David) An, Avik Chaudhuri, Jeffrey S. F...
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
13 years 12 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
FOAL
2008
ACM
13 years 9 months ago
Incremental analysis of interference among aspects
Often, insertion of several aspects into one system is desired and in that case the problem of interference among the different aspects might arise, even if each aspect individual...
Emilia Katz, Shmuel Katz
DAGSTUHL
2006
13 years 9 months ago
Efficient Software Model Checking of Data Structure Properties
This paper presents novel language and analysis techniques that significantly speed up software model checking of data structure properties. Consider checking a red-black tree imp...
Chandrasekhar Boyapati, Paul T. Darga