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RECONFIG
2009
IEEE
188views VLSI» more  RECONFIG 2009»
14 years 3 months ago
Accelerating Cryptographic Applications Using Dynamically Reconfigurable Functional Units
Antoine Trouve, Lovic Gauthier, Takayuki Kando, Be...
IEICET
2006
56views more  IEICET 2006»
13 years 8 months ago
Reconfiguration Heuristics for Logical Topologies in Wide-Area WDM Networks
Abstract--We propose several heuristic algorithms that reconfigure logical topologies in wide-area wavelength-routed optical networks. Our reconfiguration algorithms attempt to kee...
Hironao Takagi, Yongbing Zhang, Hideaki Takagi
RECONFIG
2008
IEEE
104views VLSI» more  RECONFIG 2008»
14 years 3 months ago
A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors
Lars Baunegaard With Jensen, Anders Kjaer-Nielsen,...
IPPS
2003
IEEE
14 years 1 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
14 years 1 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson