We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
Abstract. Reconfigurable computing receives its merits from scheduling timebased into space-based execution. This paper reviews some common parameters and introduces an additional ...
This paper reviews the current state of the art in highperformance reconfigurable computing (HPRC) from the perspective of EPCC, the high-performance computing centre at the Unive...
Robert Baxter, Stephen Booth, Mark Bull, Geoff Caw...