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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
14 years 3 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
ECBS
2002
IEEE
114views Hardware» more  ECBS 2002»
14 years 2 months ago
An Intelligent Agent Security Intrusion System
Network security has now become one of the most important aspects in computer systems and the Internet. Apart from strong encryption, there is no definite method of truly securing...
J. Pikoulas, William J. Buchanan, Mike Mannion, K....
INFOCOM
2002
IEEE
14 years 2 months ago
Routing Restorable Bandwidth Guaranteed Connections using Maximum 2-Route Flows
Abstract—Routing with service restorability is of much importance in Multi-Protocol Label Switched (MPLS) networks, and is a necessity in optical networks. For restoration, each ...
Koushik Kar, Murali S. Kodialam, T. V. Lakshman
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 2 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
ICSE
2010
IEEE-ACM
14 years 2 months ago
Test generation through programming in UDITA
We present an approach for describing tests using nondeterministic test generation programs. To write such programs, we introduce UDITA, a Java-based language with non-determinist...
Milos Gligoric, Tihomir Gvero, Vilas Jagannath, Sa...