331 search results - page 6 / 67 » Limits on Multiple Instruction Issue |
ISCA
2003
IEEE
14 years 2 months ago
2003
IEEE
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
ICPP
2009
IEEE
13 years 6 months ago
2009
IEEE
Several multithreading techniques have been proposed to reduce the resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is ...
ISCA
2002
IEEE
14 years 1 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
CC
2004
Springer
14 years 2 months ago
2004
Springer
An important issue in embedded systems design is the size of programs. As computing devices decrease in size, yet with more and more functions, better code size optimizations are i...
MICRO
1996
IEEE
14 years 1 months ago
1996
IEEE
As the issue widthof superscalar processors is increased, instructionfetch bandwidthrequirements will also increase. It will become necessary to fetch multiple basic blocks per cy...