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CASES
2008
ACM
13 years 10 months ago
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...
Chengmo Yang, Alex Orailoglu
CASES
2010
ACM
13 years 5 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
IEEEPACT
2008
IEEE
14 years 2 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
COMPCON
1995
IEEE
13 years 11 months ago
Tempest: A Substrate for Portable Parallel Programs
This paper describes Tempest, a collection of mechanisms for communication and synchronization in parallel programs. With these mechanisms, authors of compilers, libraries, and ap...
Mark D. Hill, James R. Larus, David A. Wood
LCPC
2001
Springer
14 years 9 days ago
A Comparative Evaluation of Parallel Garbage Collector Implementations
While uniprocessor garbage collection is relatively well understood, experience with collectors for large multiprocessor servers is limited and it is unknown which techniques best ...
C. Richard Attanasio, David F. Bacon, Anthony Cocc...