227 search results - page 36 / 46 » Limits to the Performance of Software Shared Memory: A Layer... |
ASPLOS
1998
ACM
14 years 3 days ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
DSN
2005
IEEE
14 years 1 months ago
2005
IEEE
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CM...
ICST
2008
IEEE
14 years 2 months ago
2008
IEEE
Flash memory has become virtually indispensable in most mobile devices, such as mobile phones, digital cameras, mp3 players, etc. In order for mobile devices to successfully provi...