598 search results - page 87 / 120 » Linear Controller Design Limits of Performance |
TON
2002
13 years 8 months ago
2002
In multi-hop networks, packet schedulers at downstream nodes have an opportunity to make up for excessive latencies due to congestion at upstream nodes. Similarly, when packets inc...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
USENIX
2003
13 years 9 months ago
2003
We present an in-kernel disk prefetcher which uses speculative execution to determine what data an application is likely to require in the near future. By placing our design withi...
CASES
2006
ACM
14 years 2 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
CODES
2006
IEEE
13 years 10 months ago
2006
IEEE
A key step in the design of multi-rate real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure as caused by bounded buff...