296 search results - page 54 / 60 » Linear Parametric Model Checking of Timed Automata |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
ISPAN
2002
IEEE
14 years 16 days ago
2002
IEEE
In the directed acyclic graph (dag) model of algorithms, consider the following problem for precedence-constrained multiprocessor schedules for array computations: Given a sequenc...
WSCG
2000
13 years 9 months ago
2000
This paper presents a new, accurate, efficient and unified method for dynamic animation of one, two or three-dimensional deformable objects. The objects are modelled as d-dimensio...
EURODAC
1994
IEEE
13 years 11 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
EMSOFT
2006
Springer
13 years 11 months ago
2006
Springer
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...