Sciweavers

1016 search results - page 159 / 204
» Linear error-block codes
Sort
View
CC
2010
Springer
117views System Software» more  CC 2010»
14 years 2 months ago
Punctual Coalescing
Compilers use register coalescing to avoid generating code for copy instructions. For architectures with register aliasing such as x86, Smith, Ramsey, and Holloway (2004) presented...
Fernando Magno Quintão Pereira, Jens Palsbe...
CODES
2009
IEEE
14 years 2 months ago
FlexRay schedule optimization of the static segment
The FlexRay bus is the prospective automotive standard communication system. For the sake of a high flexibility, the protocol includes a static time-triggered and a dynamic event...
Martin Lukasiewycz, Michael Glaß, Jürge...
CODES
2009
IEEE
14 years 2 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
ICC
2009
IEEE
14 years 2 months ago
Separable Implementation of L2-Orthogonal STC CPM with Fast Decoding
In this paper we present an alternative separable implementation of L2 -orthogonal space-time codes (STC) for continuous phase modulation (CPM). In this approach, we split the STC...
Matthias Hesse, Jérôme Lebrun, Lutz H...
TLCA
2009
Springer
14 years 2 months ago
Session-Based Communication Optimisation for Higher-Order Mobile Processes
In this paper we solve an open problem posed in our previous work on asynchronous subtyping [12], extending the method to higher-order session communication and functions. Our syst...
Dimitris Mostrous, Nobuko Yoshida