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ACL
2006
13 years 10 months ago
A Logic-Based Semantic Approach to Recognizing Textual Entailment
This paper proposes a knowledge representation model and a logic proving setting with axioms on demand successfully used for recognizing textual entailments. It also details a lex...
Marta Tatu, Dan I. Moldovan
TABLEAUX
2007
Springer
14 years 3 months ago
Tableau Systems for Logics of Subinterval Structures over Dense Orderings
We construct a sound, complete, and terminating tableau system for the interval temporal logic D · interpreted in interval structures over dense linear orderings endowed with stri...
Davide Bresolin, Valentin Goranko, Angelo Montanar...
FPGA
2008
ACM
145views FPGA» more  FPGA 2008»
13 years 10 months ago
FPGA interconnect design using logical effort
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong
WSC
2008
13 years 11 months ago
Discrete Rate Simulation using linear programming
Discrete Rate Simulation (DRS) is a modeling methodology that uses event based logic to simulate linear continuous processes and hybrid systems. These systems are concerned with t...
Cecile Damiron, Anthony Nastasi
GRC
2005
IEEE
14 years 2 months ago
Temporal granular logic for temporal data mining
— In this article, a formalism for a specific temporal data mining task (the discovery of rules, inferred from databases of events having a temporal dimension), is defined. The...
Paul Cotofrei, Kilian Stoffel