183 search results - page 36 / 37 » Linear-Time Algorithms in Memory Hierarchies |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
The ongoing trend of increasing computer hardware and software complexity has resulted in the increase in complexity and overheads of cycle-accurate processor system simulation, e...
IWSOC
2003
IEEE
14 years 20 days ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
MSS
2003
IEEE
14 years 20 days ago
2003
IEEE
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...