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IWSOC
2003
IEEE

Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design

14 years 4 months ago
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes. Prediction algorithms popularly based upon the Next Fetch Prediction Table (NFPT) helps making the choice between the filter cache and the main cache. In this paper we introduce a new prediction mechanism for predicting filter cache access, which relies on the hit or miss pattern of the instruction access stream over the past filter cache lines accesses. Unlike NFPT, which makes predominantly incorrect miss-predictions, the proposed Pattern Table based approach reduces this miss prediction. Predominantly correct prediction achieves efficient cache access and eliminates cache-miss penalties. Our extensive simulations across a wide range of benchmark applications illustrates that the new prediction scheme is efficient as it results in improved prediction up to 99.99%. Moreover, it reduces energy consumption o...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where IWSOC
Authors Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya, Prasanna Venkatesh Kannan
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