Sciweavers

59 search results - page 5 / 12
» Linearity of the AES Key Schedule
Sort
View
IJNSEC
2007
137views more  IJNSEC 2007»
13 years 8 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram
SACRYPT
2000
Springer
145views Cryptology» more  SACRYPT 2000»
14 years 11 days ago
Camellia: A 128-Bit Block Cipher Suitable for Multiple Platforms - Design and Analysis
We present a new 128-bit block cipher called Camellia. Camellia supports 128-bit block size and 128-, 192-, and 256-bit keys, i.e. the same interface specifications as the Advanced...
Kazumaro Aoki, Tetsuya Ichikawa, Masayuki Kanda, M...
PVG
2003
IEEE
212views Visualization» more  PVG 2003»
14 years 2 months ago
SLIC: Scheduled Linear Image Compositing for Parallel Volume Rendering
Parallel volume rendering offers a feasible solution to the large data visualization problem by distributing both the data and rendering calculations among multiple computers con...
Aleksander Stompel, Kwan-Liu Ma, Eric B. Lum, Jame...
RTSS
1996
IEEE
14 years 29 days ago
A framework for implementing objects and scheduling tasks in lock-free real-time systems
We present an integrated framework for developing realtime systems in which lock-free algorithms are employed to implement shared objects. There are two key objectives of our work...
James H. Anderson, Srikanth Ramamurthy
PC
2011
413views Management» more  PC 2011»
13 years 3 months ago
Exploiting thread-level parallelism in the iterative solution of sparse linear systems
We investigate the efficient iterative solution of large-scale sparse linear systems on shared-memory multiprocessors. Our parallel approach is based on a multilevel ILU precondit...
José Ignacio Aliaga, Matthias Bollhöfe...