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ICPP
1996
IEEE
13 years 11 months ago
A Timestamp-based Selective Invalidation Scheme for Multiprocessor Cache Coherence
- Among all software cache coherence strategaes, the ones that are based on the concept of tamestamps show the greatest potentaal an terms of cache performance. The early tamestamp...
Xin Yuan, Rami G. Melhem, Rajiv Gupta
JPDC
2006
100views more  JPDC 2006»
13 years 7 months ago
An integrated admission control scheme for the delivery of streaming media
Quality of service (QoS) assurance is a major concern in media-on-demand (MoD) systems. Admission control is one of the most important issues that need to be addressed for QoS ass...
Zhonghang Xia, I-Ling Yen, Donglei Du, Peng Li
JSS
2007
120views more  JSS 2007»
13 years 7 months ago
The design and evaluation of path matching schemes on compressed control flow traces
A control flow trace captures the complete sequence of dynamically executed basic blocks and function calls. It is usually of very large size and therefore commonly stored in com...
Yongjing Lin, Youtao Zhang, Rajiv Gupta
CVPR
2006
IEEE
14 years 9 months ago
Solving Markov Random Fields using Second Order Cone Programming Relaxations
This paper presents a generic method for solving Markov random fields (MRF) by formulating the problem of MAP estimation as 0-1 quadratic programming (QP). Though in general solvi...
M. Pawan Kumar, Philip H. S. Torr, Andrew Zisserma...
DATE
2010
IEEE
129views Hardware» more  DATE 2010»
14 years 22 days ago
A power optimization method for CMOS Op-Amps using sub-space based geometric programming
—— A new sub-space max-monomial modeling scheme for CMOS transistors in sub-micron technologies is proposed to improve the modeling accuracy. Major electrical parameters of CMOS...
Wei Gao, Richard Hornsey