303 search results - page 32 / 61 » Link-Time Improvement of Scheme Programs |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
FCCM
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
ICNP
2000
IEEE
14 years 3 days ago
2000
IEEE
Multicast sessions may have a large number of receivers with heterogeneous reception capacities. To accommodate this heterogeneity, various multi-rate schemes, based upon the use ...
EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
ICS
1995
Tsinghua U.
13 years 11 months ago
1995
Tsinghua U.
In this paper, we present a GSA-based technique that performs more e cient and more precise symbolic analysis of predicated assignments, recurrences and index arrays. The e ciency...