Sciweavers

303 search results - page 53 / 61
» Link-Time Improvement of Scheme Programs
Sort
View
ICMCS
2005
IEEE
102views Multimedia» more  ICMCS 2005»
14 years 1 months ago
Optimal packetization of VLC and convolution coded Markov sequences
We consider the problem of packetizing a variable length coded Markov sequence into fixed length packets, while being protected by variable rate channel code. Given the total tra...
Xiaohan Wang, Xiaolin Wu
MICRO
2005
IEEE
123views Hardware» more  MICRO 2005»
14 years 1 months ago
A Criticality Analysis of Clustering in Superscalar Processors
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
Pierre Salverda, Craig B. Zilles
ICCS
2005
Springer
14 years 1 months ago
Performance and Scalability Analysis of Cray X1 Vectorization and Multistreaming Optimization
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
Sadaf R. Alam, Jeffrey S. Vetter
DAC
2003
ACM
14 years 27 days ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
ISCA
2002
IEEE
103views Hardware» more  ISCA 2002»
14 years 17 days ago
Efficient Dynamic Scheduling Through Tag Elimination
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
Dan Ernst, Todd M. Austin