Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Abstract--In this article we present KRASH, a tool for reproducible generation of system-level CPU load. This tool is intended for use in shared memory machines equipped with multi...
—Designing a sensor network congestion avoidance algorithm is a challenging task due to the application specific nature of these networks. The frequency of event sensing is a de...
In order to provide a generic, applicationindependent and resource-efficient framework for server redundancy and session failover, the IETF RSerPool WG is currently standardizing ...
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...