1929 search results - page 307 / 386 » Load Balancing with Memory |
ASPLOS
2004
ACM
14 years 2 months ago
2004
ACM
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
PADS
2004
ACM
14 years 2 months ago
2004
ACM
In optimistic simulations, checkpointing techniques are often used to reduce the overhead caused by state saving. In this paper, we propose event reconstruction as a technique wit...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
HOTOS
2003
IEEE
14 years 2 months ago
2003
IEEE
Cerium is a trusted computing architecture that protects a program’s execution from being tampered while the program is running. Cerium uses a physically tamperresistant CPU and...
MSE
2000
IEEE
14 years 1 months ago
2000
IEEE
Electronic photography is gaining parts of the photography market and tends to replace gradually all argentic photography. The combination of digital camera and computer technolog...