Sciweavers

141 search results - page 22 / 29
» Load Execution Latency Reduction
Sort
View
ASPLOS
1992
ACM
14 years 20 days ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
MASCOTS
2010
13 years 10 months ago
Expanding the Event Horizon in Parallelized Network Simulations
The simulation models of wireless networks rapidly increase in complexity to accurately model wireless channel characteristics and the properties of advanced transmission technolog...
Georg Kunz, Olaf Landsiedel, Stefan Götz, Kla...
SC
1992
ACM
14 years 19 days ago
Optimal Tracing and Replay for Debugging Message-Passing Parallel Programs
A common debugging strategy involves reexecuting a program (on a given input) over and over, each time gaining more information about bugs. Such techniques can fail on message-pas...
Robert H. B. Netzer, Barton P. Miller
CF
2006
ACM
14 years 10 days ago
An efficient cache design for scalable glueless shared-memory multiprocessors
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ADHOC
2005
119views more  ADHOC 2005»
13 years 8 months ago
A link-indexed statistical traffic prediction approach to improving IEEE 802.11 PSM
Power management is an important technique to prolong the lifetime of battery-powered wireless ad hoc networks. The fact that the energy consumed in the idle state dominates the t...
Chunyu Hu, Jennifer C. Hou