Sciweavers

1749 search results - page 273 / 350
» Logic, Optimization, and Constraint Programming
Sort
View
CASES
2006
ACM
14 years 1 months ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...
KR
2000
Springer
13 years 11 months ago
Reduction rules and universal variables for first order tableaux and DPLL
Recent experimental results have shown that the strength of resolution, the propositional DPLL procedure, the KSAT procedure for description logics, or related tableau-like implem...
Fabio Massacci
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 4 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
13 years 12 months ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen
ICC
2007
IEEE
116views Communications» more  ICC 2007»
13 years 11 months ago
Robust Power Allocation for Amplify-and-Forward Relay Networks
Relay power allocation has been shown to provide substantial performance gain in wireless relay networks when perfect global channel state information (CSI) is available. In this p...
Tony Q. S. Quek, Moe Z. Win, Hyundong Shin, Marco ...