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» Logical Cryptanalysis as a SAT Problem
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CONSTRAINTS
2007
112views more  CONSTRAINTS 2007»
13 years 9 months ago
Maxx: Test Pattern Optimisation with Local Search Over an Extended Logic
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
Francisco Azevedo
LPAR
1999
Springer
14 years 2 months ago
Practical Reasoning for Expressive Description Logics
Abstract. Description Logics (DLs) are a family of knowledge representation formalisms mainly characterised by constructors to build complex concepts and roles from atomic ones. Ex...
Ian Horrocks, Ulrike Sattler, Stephan Tobies
ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
14 years 3 months ago
SAT-based optimal hypergraph partitioning with replication
We propose a methodology for optimal k-way partitioning with replication of directed hypergraphs via Boolean satisfiability. We begin by leveraging the power of existing and emerg...
Michael G. Wrighton, André DeHon
CAV
2003
Springer
107views Hardware» more  CAV 2003»
14 years 3 months ago
Theorem Proving Using Lazy Proof Explication
Many verification problems reduce to proving the validity of formulas involving both propositional connectives and domain-specific functions and predicates. This paper presents ...
Cormac Flanagan, Rajeev Joshi, Xinming Ou, James B...
DAC
1998
ACM
14 years 10 months ago
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer