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DATE
2009
IEEE
73views Hardware» more  DATE 2009»
15 years 11 months ago
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs
—Flash-based FPGAs are increasingly demanded in safety critical fields, in particular space and avionic ones, due to their non-volatile configuration memory. Although they are al...
Francesco Abate, Luca Sterpone, Massimo Violante, ...
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
15 years 10 months ago
Using functional independence conditions to optimize the performance of latency-insensitive systems
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
Cheng-Hong Li, Luca P. Carloni
ICSEA
2007
IEEE
15 years 10 months ago
DEUCE : Separating Concerns in User Interfaces
—As current software systems evolve continuously, both the application and its user interface (UI) have to be adapted. However, UI code is often scattered through and entangled w...
Sofie Goderis, Dirk Deridder, Ellen Van Paesschen
MICRO
2005
IEEE
108views Hardware» more  MICRO 2005»
15 years 9 months ago
How to Fake 1000 Registers
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading)...
David W. Oehmke, Nathan L. Binkert, Trevor N. Mudg...
FPL
2005
Springer
114views Hardware» more  FPL 2005»
15 years 9 months ago
Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Buildi
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
Andy Gean Ye, Jonathan Rose