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DAC
2012
ACM
13 years 6 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
POPL
2010
ACM
16 years 1 months ago
Pure Subtype Systems
This paper introduces a new approach to type theory called pure subtype systems. Pure subtype systems differ from traditional approaches to type theory (such as pure type systems)...
DeLesley S. Hutchins
IWMM
2007
Springer
116views Hardware» more  IWMM 2007»
15 years 10 months ago
Heap space analysis for java bytecode
This article presents a heap space analysis for (sequential) Java bytecode. The analysis generates heap space cost relations which define at compile-time the heap consumption of ...
Elvira Albert, Samir Genaim, Miguel Gómez-Z...
GLVLSI
2003
IEEE
180views VLSI» more  GLVLSI 2003»
15 years 9 months ago
3D direct vertical interconnect microprocessors test vehicle
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan...
ESWS
2008
Springer
15 years 6 months ago
Contextual and Metadata-based Approach for the Semantic Annotation of Heterogeneous Documents
We present SHIRI-Annot an automatic ontology-driven and unsupervised approach for the semantic annotation of documents which contain well structured parts and not well structured o...
Mouhamadou Thiam, Nathalie Pernelle, Nacéra...