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DAC
2008
ACM
14 years 8 months ago
Automatic synthesis of clock gating logic with controlled netlist perturbation
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Aaron P. Hurst
ASP
2003
Springer
14 years 28 days ago
Eliminating Disjunction from Propositional Logic Programs under Stable Model Preservation
Abstract. In general, disjunction is considered to add expressive power to propositional logic programs under stable model semantics, and to enlarge the range of problems which can...
Thomas Eiter, Michael Fink, Hans Tompits, Stefan W...
SACMAT
2010
ACM
14 years 16 days ago
Monitoring security policies with metric first-order temporal logic
We show the practical feasibility of monitoring complex security properties using a runtime monitoring approach for metric first-order temporal logic. In particular, we show how ...
David A. Basin, Felix Klaedtke, Samuel Müller
CORR
2010
Springer
90views Education» more  CORR 2010»
13 years 7 months ago
Logical complexity of graphs: a survey
We discuss the definability of finite graphs in first-order logic with two relation symbols for adjacency and equality of vertices. The logical depth D(G) of a graph G is equal to ...
Oleg Pikhurko, Oleg Verbitsky
TABLEAUX
2000
Springer
13 years 11 months ago
Benchmark Analysis with FaCT
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
Ian Horrocks