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MTDT
2002
IEEE
108views Hardware» more  MTDT 2002»
15 years 10 months ago
A Fault Modeling Technique to Test Memory BIST Algorithms
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil ...
142
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AIMSA
2008
Springer
16 years 5 days ago
Nested Precedence Networks with Alternatives: Recognition, Tractability, and Models
Integrated modeling of temporal and logical constraints is important for solving real-life planning and scheduling problems. Logical constrains extend the temporal formalism by rea...
Roman Barták, Ondrej Cepek
MSE
2002
IEEE
122views Hardware» more  MSE 2002»
15 years 10 months ago
Modeling and Analyzing SMIL Documents in SAM
A composite multimedia object has specific timing relationships among the different types of component media. Coordinating the real-time presentation of information and maintaini...
Huiqun Yu, Xudong He, Shu Gao, Yi Deng
CLIMA
2007
15 years 7 months ago
Formal Modelling of Emotions in BDI Agents
Emotional-BDI agents are BDI agents whose behaviour is guided not only by beliefs, desires and intentions, but also by the role of emotions in reasoning and decision-making. The EB...
David Pereira, Eugénio C. Oliveira, Nelma M...
AC
2005
Springer
15 years 5 months ago
Software model checking with SPIN
The aim of this chapter is to give an overview of the theoretical foundation and the practical application of logic model checking techniques for the verification of multi-threade...
Gerard J. Holzmann