1010 search results - page 127 / 202 » Logics for Contravariant Simulations |
ICCD
2004
IEEE
14 years 6 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
ICCAD
2006
IEEE
14 years 6 months ago
2006
IEEE
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
Given a test set for stuck-at faults, some of primary input values may be changed to opposite logic values without losing fault coverage. We can regard such input values as don’...
HYBRID
2010
Springer
14 years 4 months ago
2010
Springer
Probabilistic Computation Tree Logic (PCTL) is a wellknown modal logic which has become a standard for expressing temporal properties of finite-state Markov chains in the context...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...