2501 search results - page 476 / 501 » Logics with Rank Operators |
DAC
2009
ACM
14 years 2 months ago
2009
ACM
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
PLDI
2009
ACM
14 years 2 months ago
2009
ACM
We present the first machine-checked correctness proof for information flow control (IFC) based on program dependence graphs (PDGs). IFC based on slicing and PDGs is flow-sensi...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
DSN
2009
IEEE
14 years 2 months ago
2009
IEEE
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
ISW
2009
Springer
14 years 1 months ago
2009
Springer
The frequency and severity of a number of recent intrusions involving data theft and leakages has shown that online users’ trust, voluntary or not, in the ability of third partie...