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GLVLSI
1998
IEEE
118views VLSI» more  GLVLSI 1998»
14 years 1 months ago
RCRS: A Framework for Loop Scheduling with Limited Number of Registers
Kaisheng Wang, Ted Zhihong Yu, Edwin Hsing-Mean Sh...
CC
1998
Springer
125views System Software» more  CC 1998»
14 years 1 months ago
A New Fast Algorithm for Optimal Register Allocation in Modulo Scheduled Loops
Sylvain Lelait, Guang R. Gao, Christine Eisenbeis