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ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
14 years 4 days ago
Design methodology for IRA codes
Channel coding is an important building block in communication systems since it ensures the quality of service. Irregular repeat-accumulate (IRA) codes belong to the class of Low-...
Frank Kienle, Norbert Wehn
VLSID
2005
IEEE
100views VLSI» more  VLSID 2005»
14 years 7 months ago
Implementing LDPC Decoding on Network-on-Chip
Low-Density Parity Check codes are a form of Error Correcting Codes used in various wireless communication applications and in disk drives. While LDPC codes are desirable due to t...
Theo Theocharides, Greg M. Link, Narayanan Vijaykr...
SIPS
2007
IEEE
14 years 1 months ago
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
ICIP
2008
IEEE
14 years 1 months ago
Distributed 3D dynamic mesh coding
In this paper, we propose a distributed 3D dynamic mesh coding system. The system is based on Slepian and Wolf’s and Wyner and Ziv’s information-theoretic results. Our system ...
M. Oguz Bici, Gozde Bozdagi Akar
ICASSP
2011
IEEE
12 years 10 months ago
Multiple LDPC decoding using bitplane correlation for Transform Domain Wyner-Ziv video coding
Distributed video coding (DVC) is an emerging video coding paradigm for systems which fully or partly exploit the source statistics at the decoder to reduce the computational burd...
Huynh Van Luong, Xin Huang, Søren Forchhamm...