155 search results - page 17 / 31 » Low Power Techniques for Digital GaAs VLSI |
VLSID
2008
IEEE
14 years 7 months ago
2008
IEEE
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
TVLSI
2002
13 years 7 months ago
2002
Gate diffusion input (GDI)--a new technique of low-power digital combinatorial circuit design--is described. This technique allows reducing power consumption, propagation delay, an...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
In this paper, we consider power spectral density estimation of bandlimited, wide-sense stationary signals from sub-Nyquist sampled data. This problem has recently received attent...
DFT
2007
IEEE
14 years 1 months ago
2007
IEEE
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...