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» Low Power Techniques for Digital GaAs VLSI
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SBCCI
2009
ACM
145views VLSI» more  SBCCI 2009»
14 years 2 months ago
Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor
The purpose of this work is the proposal of a 10-Bit / 1 MSPS Analog to Digital Converter (ADC) with error correction to match the requirements of a CMOS wavefront sensor for opht...
Frank Sill, Davies W. de Lima Monteiro
CLOUD
2010
ACM
14 years 17 days ago
Virtual machine power metering and provisioning
Virtualization is often used in cloud computing platforms for its several advantages in efficiently managing resources. However, virtualization raises certain additional challeng...
Aman Kansal, Feng Zhao, Jie Liu, Nupur Kothari, Ar...
GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
14 years 23 days ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
TVLSI
2008
197views more  TVLSI 2008»
13 years 7 months ago
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology
-- Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicron regime. As a result, reducing the subthreshold a...
Behnam Amelifard, Farzan Fallah, Massoud Pedram
FPGA
2004
ACM
136views FPGA» more  FPGA 2004»
14 years 26 days ago
Active leakage power optimization for FPGAs
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
Jason Helge Anderson, Farid N. Najm, Tim Tuan