Sciweavers

155 search results - page 28 / 31
» Low Power Techniques for Digital GaAs VLSI
Sort
View
ICITA
2005
IEEE
14 years 1 months ago
Performance Tuning in the MacauMap Mobile Map Application
With the increasing popularity of mobile computing platforms such as personal digital assistants (PDAs) and smart mobile phones, applications originally designed for higherperform...
Robert P. Biuk-Aghai
CDES
2006
106views Hardware» more  CDES 2006»
13 years 8 months ago
Reducing Memory References for FFT Calculation
Fast Fourier Transform (FFT) is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication applications. many of t...
Ayman Elnaggar, Mokhtar Aboelaze
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 1 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...
CODES
2008
IEEE
14 years 1 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
ANCS
2009
ACM
13 years 5 months ago
Progressive hashing for packet processing using set associative memory
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
Michel Hanna, Socrates Demetriades, Sangyeun Cho, ...