Sciweavers

3799 search results - page 106 / 760
» Low Power or High Performance
Sort
View
ISCAS
2006
IEEE
110views Hardware» more  ISCAS 2006»
15 years 10 months ago
Network-on-chip link analysis under power and performance constraints
— This paper analyzes the behavior of interconnects in the highly structured environment of a network-on-chip (NoC). Two distinct classes of wires are considered, namely links be...
Manho Kim, Daewook Kim, Gerald E. Sobelman
EVOW
2000
Springer
15 years 7 months ago
Prediction of Power Requirements for High-Speed Circuits
Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from f...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
ISER
1997
Springer
95views Robotics» more  ISER 1997»
15 years 8 months ago
FREEDOM-7: A High Fidelity Seven Axis Haptic Device with Application to Surgical Training
: A seven axis haptic device, called the Freedom-7, is described in relation to its application to surgical training. The generality of its concept makes it also relevant to most o...
Vincent Hayward, P. Gregorio, Oliver R. Astley, St...
OSDI
2008
ACM
16 years 4 months ago
A Comparison of High-Level Full-System Power Models
Dynamic power management in enterprise environments requires an understanding of the relationship between resource utilization and system-level power consumption. Power models bas...
Suzanne Rivoire, Parthasarathy Ranganathan, Christ...
HPCA
1996
IEEE
15 years 8 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...