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ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
13 years 7 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...
ESORICS
2009
Springer
14 years 8 months ago
Cumulative Attestation Kernels for Embedded Systems
1 There are increasing deployments of networked embedded systems and rising threats of malware intrusions on such systems. To mitigate this threat, it is desirable to enable common...
Michael LeMay, Carl A. Gunter
FPGA
2004
ACM
234views FPGA» more  FPGA 2004»
13 years 11 months ago
An embedded true random number generator for FPGAs
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
Paul Kohlbrenner, Kris Gaj
CASES
2003
ACM
14 years 24 days ago
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-m...
Sumesh Udayakumaran, Rajeev Barua
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
13 years 9 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....