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ICS
2009
Tsinghua U.
14 years 7 hour ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
NETWORK
2006
186views more  NETWORK 2006»
13 years 7 months ago
Multiuser cross-layer resource allocation for video transmission over wireless networks
With the advancement of video-compression technology and the wide deployment of wireless networks, there is an increasing demand for wireless video communication services, and man...
Guan-Ming Su, Zhu Han, Min Wu, K. J. Ray Liu
DELTA
2006
IEEE
14 years 1 months ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
SC
2004
ACM
14 years 25 days ago
Will Moore's Law Be Sufficient?
—It seems well understood that supercomputer simulation is an enabler for scientific discoveries, weapons, and other activities of value to society. It also seems widely believed...
Erik DeBenedictis
ISPASS
2005
IEEE
14 years 1 months ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...