97 search results - page 11 / 20 » Low power network processor design using clock gating |
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
SENSYS
2009
ACM
14 years 9 days ago
2009
ACM
A specific application for wastewater monitoring and actuation, called CSOnet, deployed city-wide in a mid-sized US city, South Bend, Indiana, posed some challenges to a time syn...
CONIELECOMP
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we present the design and implementation of a PLC (Power-Line Communication) Modem based on Orthogonal Frequency Division Multiplexing (OFDM). The PLC device implem...
MOBISYS
2011
ACM
12 years 10 months ago
2011
ACM
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
We have developed a system architecture, measuring and modeling techniques, and algorithms for on-line power and energy optimization and thermal management. The starting point for...