552 search results - page 39 / 111 » Low power techniques for Motion Estimation hardware |
158
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HPCA
1996
IEEE
15 years 10 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
162
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ISCAS
2003
IEEE
15 years 11 months ago
2003
IEEE
A new global motion estimation technique for sprite coding is presented in this paper. The proposed system manages to accurately register frames to a sprite without referencing th...
164
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CAV
2008
Springer
15 years 7 months ago
2008
Springer
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
114
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ASPDAC
1999
ACM
15 years 10 months ago
1999
ACM
- We describe an integrated model of the hardware and the battery sub-systems in batterypowered VLSI systems. We demonstrate that, under this model and for a fixed operating voltag...
156
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ICCV
1999
IEEE
15 years 10 months ago
1999
IEEE
We describe a learning-based method for low-level vision problems--estimating scenes from images. We generate a synthetic world of scenes and their corresponding rendered images, m...