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» Lower Bounds of Computational Power of a Synaptic Calculus
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ICCAD
1994
IEEE
61views Hardware» more  ICCAD 1994»
13 years 11 months ago
Simultaneous driver and wire sizing for performance and power optimization
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
Jason Cong, Cheng-Kok Koh
ISTCS
1993
Springer
13 years 11 months ago
Analog Computation Via Neural Networks
We pursue a particular approach to analog computation, based on dynamical systems of the type used in neural networks research. Our systems have a xed structure, invariant in time...
Hava T. Siegelmann, Eduardo D. Sontag
CASES
2009
ACM
13 years 5 months ago
Spatial complexity of reversibly computable DAG
In this paper we address the issue of making a program reversible in terms of spatial complexity. Spatial complexity is the amount of memory/register locations required for perfor...
Mouad Bahi, Christine Eisenbeis
SOSP
2001
ACM
14 years 4 months ago
Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems
In recent years, there has been a rapid and wide spread of nontraditional computing platforms, especially mobile and portable computing devices. As applications become increasingl...
Padmanabhan Pillai, Kang G. Shin
CORR
2007
Springer
120views Education» more  CORR 2007»
13 years 7 months ago
On the Feedback Capacity of Power Constrained Gaussian Noise Channels with Memory
—For a stationary additive Gaussian-noise channel with a rational noise power spectrum of a finite-order L, we derive two new results for the feedback capacity under an average ...
Shaohua Yang, Aleksandar Kavcic, Sekhar Tatikonda